224G doesn't kill copper. It makes every millimeter more expensive.
That's the distinction getting lost in most discussions about AI networking.
At 224G PAM4, OIF framework-era targets span roughly:
15 dB — XSR
32 dB — VSR
35 dB — MR
40 dB — LR
And here's what that can mean on an actual PCB.
In one representative 60 mm channel example:
112G @ 28 GHz: <10 dB insertion loss
224G @ 56 GHz: 18–20 dB
Same length.
Same basic routing problem.
Very different channel margin.
You can fight back.
Better laminate.
Lower-profile copper.
Backdrilled vias.
Cleaner launches.
More aggressive equalization.
Different floorplanning.
We've been doing exactly that for generations.
But none of those tricks repeal skin effect or dielectric loss.
And that's why I think saying "copper is dead" misses the engineering story.
Copper isn't dead.
Its efficient reach is shrinking.
That distinction matters because once your channel budget starts dictating ASIC placement, board architecture, power consumption, and cooling requirements, interconnect stops being a routing problem.
It becomes a system architecture problem.
That's where co-packaged optics enters the conversation.
Not because photons are fashionable.
Because moving the electro-optical conversion closer to the ASIC can eliminate a significant portion of the lossy electrical path.
I broke down the 224G channel problem, CPO architecture, and the manufacturing constraints behind it here:
[silicontosoftware.com/co-packaged-op…]
For engineers working on high-speed hardware, save the article as a practical reference for evaluating where copper still makes sense — and where optical I/O starts becoming part of the architecture.
That's the distinction getting lost in most discussions about AI networking.
At 224G PAM4, OIF framework-era targets span roughly:
15 dB — XSR
32 dB — VSR
35 dB — MR
40 dB — LR
And here's what that can mean on an actual PCB.
In one representative 60 mm channel example:
112G @ 28 GHz: <10 dB insertion loss
224G @ 56 GHz: 18–20 dB
Same length.
Same basic routing problem.
Very different channel margin.
You can fight back.
Better laminate.
Lower-profile copper.
Backdrilled vias.
Cleaner launches.
More aggressive equalization.
Different floorplanning.
We've been doing exactly that for generations.
But none of those tricks repeal skin effect or dielectric loss.
And that's why I think saying "copper is dead" misses the engineering story.
Copper isn't dead.
Its efficient reach is shrinking.
That distinction matters because once your channel budget starts dictating ASIC placement, board architecture, power consumption, and cooling requirements, interconnect stops being a routing problem.
It becomes a system architecture problem.
That's where co-packaged optics enters the conversation.
Not because photons are fashionable.
Because moving the electro-optical conversion closer to the ASIC can eliminate a significant portion of the lossy electrical path.
I broke down the 224G channel problem, CPO architecture, and the manufacturing constraints behind it here:
[silicontosoftware.com/co-packaged-op…]
For engineers working on high-speed hardware, save the article as a practical reference for evaluating where copper still makes sense — and where optical I/O starts becoming part of the architecture.
Aug 27, 2026 · 10:45 PM UTC
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