Great news for those using Ibex, the production-quality open source 32-bit RISC-V CPU core written in SystemVerilog! We offer paid support, training, and consultancy services for teams utilizing the core. Reach out to info@lowRISC.org to find out more! github.com/lowRISC/ibex

On 28 Aug. our CEO Javier Orensanz Martinez & security expert Pascal Nasahl are discussing how the OpenTitan design can be adapted in the future to address the challenges introduced by the availability of quantum computers. Register for the IoTSF webinar: us06web.zoom.us/webinar/regist…

We're #hiring software engineers of all levels - from recent graduates to Principal Engineer - to join us in Cambridge to work on ground breaking projects such as OpenTitan & Sonata. If you're ready start making a difference in lowRISC's mission, apply now:bit.ly/457gAG7

Did you know we offer paid support and consultancy services for OpenTitan? If you're interested in learning more about how lowRISC can help support your team's use of the OpenTitan hardware and software, contact the team at info@lowrisc.org today. lowrisc.org

Don't miss your opportunity to join the lowRISC team as a Junior Product Marketing Manager. Apply today and help the team plan, create and deliver technical marketing collateral that showcases lowRISC’s open source designs and products: bit.ly/455ElhP

As compared to Physical Memory Protection (PMP), CHERI and CHERIoT take a different approach to memory safety. In our blog, we explore these differences and other facets of memory safety features and their impact on the Ibex based processor area: lowrisc.org/news/memory-sa…

With the goal of attracting more users to OpenTitan, our Ibex processor and the CHERI security extensions, we are hiring a Junior Product Marketing Manager. If you have experience creating content in a technically focused marketing role, apply now: lowrisc.applytojob.com/apply/Ivp4qL7l…

Alongside @Cambridge_Uni & @ETH_en, we've explored ensuring efficient & secure implementation of NIST standardized quantum-secure algorithms on the #OpenTitan platform. Discover the projects & our vision for open source PQC-ready secure silicon: lowrisc.org/news/lowrisc-t…

CHERIoT-Ibex secure microcontrollers are coming to market to help stem the ~70% of exploits from memory safety vulnerabilities. Learn how CHERI technology enforces safety in hardware, delivering performance and protection for IoT, automotive & beyond. lowrisc.org/news/lowrisc-a…

#ICYMI - You can now watch the full video of lowRISC's Marno Van Der Maas presenting at the 2025 CHERI Blossoms conference. He shares insights into how the CHERI Alliance is standardising their repositories to support CHERI development in the open▶️ youtube.com/watch?v=CEiCFF…

Discover Sonata - a system for evaluating the usage of #CHERIoT-Ibex core as a microcontroller for embedded, IoT and Operational Technology applications. Explore all the system documentation and get started now on @github: bit.ly/464cvDt

Do you have a passion for both technology and marketing? If so, then our new Junior Product Marketing Manager role could be your next job. Join us in Cambridge, immerse yourself in our technology and craft messaging to help us change the world! lowrisc.applytojob.com/apply/Ivp4qL7l…

We're #hiring an experienced Technical Project Manager to join our #engineering team. This hands-on role in our Cambridge office works with technical teams and external partners to deliver complex #opensource silicon projects. Explore the role: bit.ly/4kurqKI

Open silicon designs avoid costly “re-invention of wheels” & allow scarce development resources to be focused on USPs instead, while also providing complete systems for academia to leverage for research. Explore this virtuous circle & its economic benefits:bit.ly/446ktJE

The shift to #PQC is a critical undertaking. As NIST has standardised quantum-secure algorithms such as ML-DSA, research is now focusing on efficient & secure implementations. We explore 3 projects conducted in collaboration with prestigious universities: lowrisc.org/news/lowrisc-t…

We're #hiring! Do you have project management experience in highly technical environments & a strong understanding of good practices in planning and managing delivery of technically challenging projects? Apply to our Technical Project Manager position: lowrisc.applytojob.com/apply/AfMaEev0…

Ready to jump in to Ibex? Start exploring our production-quality open source 32-bit RISC-V CPU core on @github today! github.com/lowRISC/ibex?t…

If you're interested in further support, we offer commercial support services. Reach out to info@lowrisc.org for details.

lowRISC is different. Explore some of the things that distinguish us in the open silicon world, and which drive and shape our work: lowrisc.org/about-us/

We're hiring an experienced Technical Project Manager to join our team in Cambridge! If you have experience in highly technical environments, hardware development processes and a familiarity with open-source collaborative development projects, apply today. lowrisc.applytojob.com/apply/AfMaEev0…

Silicon design is much more time-consuming and expensive than software. Learn how an appropriately managed open-source approach, such as we and our partners have used on OpenTitan, helps reduce these costs🔗 bit.ly/446ktJE

In security domains, memory safety vulnerabilities are a major source of software security issues. Discover how Ibex has been used to implement two different extensions that improve memory safety: bit.ly/4jNhXh3

ICYMI: Sonata System: v1.2 is now available! This new release incorporates the CHERIoT debug module, CHERIoT Ibex fixes for MISA and more! Find it on @github now: github.com/lowRISC/sonata…

The CHERI Alliance is standardising CHERI Alliance repositories to support CHERI development in the open!

You can now watch the full video of lowRISC's Marno Van Der Maas presenting on this topic at the 2025 CHERI Blossoms conference▶️ bit.ly/3HzzImE

#ICYMI - the lowRISC team recently published a paper exploring the area impact of adding memory safety extensions to the Ibex RISC-V core, focusing on PMP and CHERIoT. Access the full paper for our findings 📃arxiv.org/abs/2505.08541

lowRISC recently published a paper that explores the area impact of adding memory safety extensions to the Ibex RISC-V core, focusing on PMP and CHERIoT. Access the full paper 🔗 arxiv.org/abs/2505.08541

We're proud to welcome Javier Orensanz Martinez as lowRISC's new CEO! With 20+ yrs of experience in the semiconductor space, he supports our mission to advance commercially relevant, open-source silicon designs that are widely adopted throughout industry. lowrisc.org/news/lowrisc-w…

Today at 16:45 in Gaston Berger Rivos presents on OpenTitan Integrated, an open-source silicon RoT based on RISC-V specifically tailored for integration into the security subsystems of large SoCs. It is developed by OpenTitan partners, including lowRISC. riscv-europe.org/summit/2025/pr…

Introducing the latest version of Sonata System: v1.2! This new release incorporates the CHERIoT debug module, CHERIoT Ibex fixes for MISA and more! Find it on @github now: github.com/lowRISC/sonata…

We're proud to announce that OpenTitan has won the Cambridge Ring Hall of Fame Product of the Year Award 2024! cst.cam.ac.uk/ring/halloffame

Come and see OpenTitan in action at lowRISC's @risc_v Summit Europe stand.

It's time for @risc_v Summit Europe 2025! We are a proud Silver Sponsor of this year's event and our team is in Paris ready to connect with the #RISCV community. Reach out to info@lowrisc.org to schedule a meeting! riscv-europe.org/summit/2025/

We’re excited to be a silver sponsor of RISC-V Summit Europe 2025, taking place May 12-15 in Paris!🎉This event brings together the global #RISC-V community to explore the latest from industry, government, research, academia, ecosystem & more!
👉 Register: riscv-europe.org/summit/2025/re…

Interested how #CHERIoT reduces the attack surface for common vulnerabilities? Or how the Sonata platform helps embedded engineers evaluate a full CHERIoT-Ibex system ahead of silicon availability? In his @ElectronicDesgn article our CEO breaks it down: bit.ly/4jZDoMm

At CHERI Blossoms 2025, our CEO, along with SCI Semiconductor, announced the release of an open-source CHERIoT-Ibex SoC design repository & SCI's plans to bring secure Iceni microcontrollers based on it to market. Missed it? Find the recording & slide deck:cheri-alliance.org/events/speaker…

We are less than a month away from the @risc_v Summit Europe being held 12-15 May, 2025 in Paris! We are proud to be a Silver sponsor! Make sure you register for the event and reach out to us at info@lowrisc.com to schedule a meeting 📩 riscv-europe.org/summit/2025/re…

Interested in how together, lowRISC & the CHERI Alliance are standardising CHERI Alliance repositories to support CHERI development in the open? Marno Van Der Maas presented a poster on this at the 2025 CHERI Blossoms conference, available for download now:cheri-alliance.org/events/speaker…

Mark your calendars for the upcoming @risc_v Summit Europe being held 12-15 May, 2025 in Paris! Our team is looking forward to updating the industry on the year's progress and achievements. Register today 🔗 riscv-europe.org/summit/2025/re…

Hardware memory safety features such as PMP or CHERI cost lots of silicon area... or do they? Find out the reality in our new blog, where we explore the impact of adding memory safety extensions to the Ibex RISC-V core: lowrisc.org/news/memory-sa…

"Our belief is that security is a really important thing, it's foundational, and it should be available to everybody," said our CEO in an interview with @eetimes. Hear the significance of open sourcing of the #CHERIoT-Ibex-based Sunburst Chip design▶️ eetimes.com/cheriot-ibex-c…

Memory safety vulnerabilities lie behind up to 70% of reported exploits; CHERIoT-Ibex microcontrollers efficiently address this perennial weakness at the hardware level. Discover how lowRISC, together with SCI Semiconductor, are making this a reality: bit.ly/4i5A8O7

Join us as a Senior/Principal Digital Design Engineer and use your expertise in developing high-quality IP! Contribute to OpenTitan - the pioneering open silicon hardware security project that powered the 1st commercially available open silicon RoT chip. bit.ly/4liopyN

Our CEO and SCI Semiconductors' CEO spoke with @eetimes on the Sunburst Chip repository being available on GitHub for secure microcontroller development! Watch the interview to learn more about the announcement: eetimes.com/cheriot-ibex-c…

Excited for tomorrow's CHERI Blossoms Conference! Don't miss our CEO's and SCI Semiconductors' CEO's talk on Sunburst project results & a big announcement! Also catch Marno Van Der Maas' talk on Sonata platform developments. Hope to see you there! cheri-alliance.org/events/cheri-b…

Following Sonata’s success, the Sunburst project was extended to include SCI Semiconductor. During the CHERI Blossoms Conference on 2 April, the CEOs of lowRISC and SCI will be making an exciting announcement! Register and be the first to hear! cheri-alliance.org/events/cheri-b…

Attending tomorrow's @DigiCatapult showcase to explore the DSbD cohort’s work on #CHERIoT and #CHERI for embedded devices? Make sure you catch Marno van der Maas in the panel discussion about the Sonata platform. dsbd.tech/event/the-futu…

Our team had a excellent time at Embedded World last week demonstrating the #Sonata platform and looking more closely at our OpenTitan Voyager board! Thank you to everyone that stopped by the booth! sunburst-project.org

At Embedded World tomorrow watch a demo of the #Sonata platform at @embedded_comp's booth at 3:30 p.m.

View the OpenTitan Voyager board and learn more about Sonata with the lowRISC and @newaetech teams at CHERI Alliance booth 5-169! embedded-world.de/en/conferences…

There's never been a more exciting time to join lowRISC! As Senior/Principal Design Verification Engineer your focus will be on DV for the range of open-source designs we are collaboratively developing, including future iterations of OpenTitan! Apply now: lowrisc.applytojob.com/apply/cfuaPFna…

Next week at Embedded World watch a demo of the #Sonata board at @embedded_comp's booth at 3:30 p.m. on March 12.

View the OpenTitan Voyager board and learn more about Sonata with the lowRISC and @newaetech teams at CHERI Alliance booth 5-169! embedded-world.de/en/conferences…

Marno Van der Maas followed his #soocon25 talk on the #CHERI Alliance with an exciting tutorial: how to compose and modify #OpenTitan IP blocks to create your own chip! Watch his walkthrough & learn how to build your own SoC from scratch: youtube.com/watch?v=aQIkfy…

At #soocon25 Marno van der Maas discussed the problem of memory safety, how CHERI technology can help, and gave an introduction to the CHERI Alliance! Missed it? You can watch his full presentation now: youtube.com/watch?v=OEhOUW…

Eager to jump into the world of Sonata - the open source platform for evaluating CHERIoT?

Our Senior Project Manager John Thomson discusses the technology that is helping move CHERI and CHERIoT into the mainstream in his #FOSDEM2025 talk▶️ mirrors.dotsrc.org/fosdem/2025/h1…

It was great to meet many of you at the @UKRI_News DSbD showcase event! Many from the ecosystem are using the @lowRISC and NewAE produced Sonata boards for exploring CHERIoT-Ibex in the embedded and OT space. If you didn't get a chance to catch up email info@lowrisc.org!